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CMOS STATIC RAM 16K (2K x 8 BIT)
Integrated Device Technology, Inc.
IDT6116SA IDT6116LA
FEATURES:
* High-speed access and chip select times -- Military: 20/25/35/45/55/70/90/120/150ns (max.) -- Commercial: 15/20/25/35/45ns (max.) * Low-power consumption * Battery backup operation -- 2V data retention voltage (LA version only) * Produced with advanced CMOS high-performance technology * CMOS process virtually eliminates alpha particle soft-error rates * Input and output directly TTL-compatible * Static operation: no clocks or refresh required * Available in ceramic and plastic 24-pin DIP, 24-pin Thin Dip and 24-pin SOIC and 24-pin SOJ * Military product compliant to MIL-STD-833, Class B
DESCRIPTION:
The IDT6116SA/LA is a 16,384-bit high-speed static RAM organized as 2K x 8. It is fabricated using IDT's high-performance, high-reliability CMOS technology. Access times as fast as 15ns are available. The circuit also offers a reduced power standby mode. When CS goes HIGH, the circuit will automatically go to, and remain in, a standby power mode, as long as CS remains HIGH. This capability provides significant system level power and cooling savings. The low-power (LA) version also offers a battery backup data retention capability where the circuit typically consumes only 1W to 4W operating off a 2V battery. All inputs and outputs of the IDT6116SA/LA are TTLcompatible. Fully static asynchronous circuitry is used, requiring no clocks or refreshing for operation. The IDT6116SA/LA is packaged in 24-pin 600 and 300 mil plastic or ceramic DIP and a 24-lead gull-wing SOIC, and a 24 -lead J-bend SOJ providing high board-level packing densities. Military grade product is manufactured in compliance to the latest version of MIL-STD-883, Class B, making it ideally suited to military temperature applications demanding the highest level of performance and reliability.
FUNCTIONAL BLOCK DIAGRAM
A0 VCC ADDRESS DECODER A 10 128 X 128 MEMORY ARRAY GND
I/O 0 INPUT DATA CIRCUIT I/O 7
I/O CONTROL
CS OE WE
CONTROL CIRCUIT
3089 drw 01
The IDT logo is aregistered trademark of Integrated Device Technology, Inc.
MILITARY AND COMMERCIAL TEMPERATURE RANGES
(c)1996 Integrated Device Technology, Inc. For latest information contact IDT's web site at www.idt.com or fax-on-demand at 408-492-8391.
MARCH 1996
3089/1
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IDT6116SA/LA CMOS STATIC RAM 16K (2K x 8-BIT)
MILITARY AND COMMERCIAL TEMPERATURE RANGES
PIN CONFIGURATIONS CAPACITANCE (TA = +25C, F = 1.0 MHZ)
A7 A6 A5 A4 A3 A2 A1 A0 I/O 0 I/O 1 I/O 2 GND 1 2 3 4 5 6 7 8 9 10 11 12 24 23 22 21 20 19 18 17 16 15 14 13 VCC A8 A9
WE OE
Symbol CIN CI/O
Parameter(1) Input Capacitance I/O Capacitance
Conditions VIN = 0V VOUT = 0V
Max. 8 8
Unit pF pF
P24-2 P24-1 D24-2 D24-1 SO24-2 & S024-4
A10
CS
NOTE: 3089 tbl 03 1. This parameter is determined by device characterization, but is not production tested.
I/O7 I/O6 I/O5 I/O4 I/O3
3089 drw 02
DIP/SOIC/SOJ TOP VIEW
ABSOLUTE MAXIMUM RATINGS (1)
Symbol Rating Commercial Military Unit V C C C W mA Terminal Voltage VTERM(2) with Respect to GND -0.5 to + 7.0 -0.5 to +7.0 TA Operating Temperature Temperature Under Bias Storage Temperature Power Dissipation DC Output Current 0 to + 70 -55 to +125
PIN DESCRIPTIONS
A0-A13 I/O0-I/O7
CS WE OE
TBIAS Address Inputs Data Input/Output Chip Select Write Enable Output Enable Power Ground
3089 tbl 01
-55 to + 125 -65 to +135 -55 to + 125 -65 to +150 1.0 50 1.0 50
TSTG PT IOUT
VCC GND
NOTES: 3089 tbl 04 1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. 2. VTERM must not exceed VCC +0.5V.
TRUTH TABLE(1)
Mode Standby Read Read Write
CS OE WE
I/O High-Z DATAOUT High-Z DATAIN
3089 tbl 02
H L L L
X L H X
X H H L
NOTE: 1. H = VIH, L = VIL, X = Don't Care.
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IDT6116SA/LA CMOS STATIC RAM 16K (2K x 8-BIT)
MILITARY AND COMMERCIAL TEMPERATURE RANGES
RECOMMENDED OPERATING TEMPERATURE AND SUPPLY VOLTAGE
Grade Military Commercial Ambient Temperature -55C to +125C 0C to +70C GND 0V 0V VCC 5.0V 10% 5.0V 10%
3089 tbl 05
RECOMMENDED DC OPERATING CONDITIONS
Symbol VCC GND VIH VIL Parameter Supply Voltage Supply Ground Input High Voltage Input Low Voltage Min. 4.5 0 2.2 -0.5(1) Typ. 5.0 0 3.5 -- Max. 5.5(2) 0 VCC +0.5 0.8 Unit V V V V
NOTES: 3089 tbl 06 1. VIL (min.) = -3.0V for pulse width less than 20ns, once per cycle. 2. VIN must not exceed VCC +0.5V.
DC ELECTRICAL CHARACTERISTICS
VCC = 5.0V 10%
Symbol |ILI| |ILO| VOL VOH Parameter Input Leakage Current Output Leakage Current Output Low Voltage Output High Voltage Test Conditions MIL. VCC = Max., VIN = GND to VCC VCC = Max.
CS
IDT6116SA Min. Max. -- -- -- -- -- 2.4 10 5 10 5 0.4 -- COM'L. MIL. COM'L.
IDT6116LA Min. Max. -- -- -- -- -- 2.4 5 2 5 2 0.4 --
Unit A A V V
3089 tbl 07
= VIH, VOUT = GND to VCC IOL = 8mA, VCC = Min.
IOH = -4mA, VCC = Min.
DC ELECTRICAL CHARACTERISTICS (1)
VCC = 5.0V 10%, VLC = 0.2V, VHC = VCC - 0.2V
6116SA15(2) 6116LA15(2) Symbol ICC1 Parameter Operating Power Supply Current, CS VIL, Outputs Open, VCC = Max., f = 0 Dynamic Operating Current, CS VIL, VCC = Max., Outputs Open, f = fMAX(4) Standby Power Supply Current (TTL Level) CS VIH, VCC = Max., Outputs Open, f = fMAX(4) Full Standby Power Supply Current (CMOS Level), CS VHC, VCC = Max., VIN VHC or VIN VLC, f = 0 Power Com'l. SA LA SA LA SA LA SA LA 105 95 150 140 40 35 2 0.1 Mil. -- -- -- -- -- -- -- -- 6116SA20 6116LA20 Com'l. 105 95 130 120 40 35 2 0.1 Mil. 130 120 150 140 50 45 10 0.9 6116SA25 6116LA25 Com'l. 80 75 120 110 40 35 2 0.1 Mil. 90 85 135 125 45 40 10 0.9 6116SA35 6116LA35 Com'l. 80 75 100 95 25 25 2 0.1 Mil. 90 85 115 105 35 30 10 0.9 mA mA mA Unit mA
ICC2
ISB
ISB1
NOTES: 1. All values are maximum guaranteed values. 2. 0C to + 70C temperature range only. 3. -55C to + 125C temperature range only. 4. fMAX = 1/tRC, only address inputs are cycling at fMAX, f = 0 means address inputs are not changing.
3089 tbl 08
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IDT6116SA/LA CMOS STATIC RAM 16K (2K x 8-BIT)
MILITARY AND COMMERCIAL TEMPERATURE RANGES
DC ELECTRICAL CHARACTERISTICS (1) (Continued)
VCC = 5.0V 10%, VLC = 0.2V, VHC = VCC - 0.2V
6116SA45 6116LA45 6116SA55(3) 6116LA55(3) Com'l. Mil. 6116SA70(3) 6116LA70(3) Com'l. Mil. 6116SA90(3) 6116LA90(3) Com'l. Mil. 6116SA120(3) 6116LA120(3) Com'l. Mil. 6116SA150(3) 6116LA150(3) Com'l. Mil.
Symbol ICC1
Parameter Operating Power Supply Current, CS VIL, Outputs Open, VCC = Max., f = 0 Dynamic Operating Current, CS VIL, VCC = Max., Outputs Open, f = fMAX(4) Standby Power Supply Current (TTL Level) CS VIH, VCC = Max., Outputs Open, f = fMAX(4) Full Standby Power Supply Current (CMOS Level), CS VHC, VCC = Max., VIN VHC or VIN VLC, f = 0
Power Com'l. Mil. SA LA SA LA SA LA SA LA 80 75 100 90 25 20 2 0.1 90 85 100 95 25 20 10 0.9
Unit mA
-- -- -- -- -- -- -- --
90 85 100 90 25 20 10 0.9
-- -- -- -- -- -- -- --
90 85 100 90 25 20 10 0.9
-- -- -- -- -- -- -- --
90 85 100 85 25 25 10 0.9
-- -- -- -- -- -- -- --
90 85 100 85 25 15 10 0.9
-- -- -- -- -- -- -- --
90 85 90 85 25 15 10 0.9
ICC2
mA
ISB
mA
ISB1
mA
NOTES: 1. All values are maximum guaranteed values. 2. 0C to + 70C temperature range only. 3. -55C to + 125C temperature range only. 4. fMAX = 1/tRC, only address inouts are toggling at fMAX, f = 0 means address inputs are not changing.
3089 tbl 09
DATA RETENTION CHARACTERISTICS OVER ALL TEMPERATURE RANGES
(LA Version Only) VLC = 0.2V, VHC = VCC - 0.2V
Typ.(1) VCC Symbol VDR ICCDR tCDR(3) tR(3) |ILI| Parameter VCC for Data Retention Data Retention Current
CS
Max. VCC 2.0V -- 200 20 -- -- 2 3.0V -- 300 30 -- -- 2 ns ns A
3089 tbl 10
Test Conditions -- MIL. VHC COM'L. VIN VHC or VLC
Min. 2.0 -- -- -- tRC(2) --
2.0V -- 0.5 0.5 0 -- --
3.0V -- 1.5 1.5 -- -- --
Unit V A
Data Deselect to Data Retention Time Operation Recovery Time Input Leakage Current
NOTES: 1. TA = + 25C 2. tRC = Read Cycle Time. 3. This parameter is guaranteed by device characterization, but is not production tested.
5.1
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IDT6116SA/LA CMOS STATIC RAM 16K (2K x 8-BIT)
MILITARY AND COMMERCIAL TEMPERATURE RANGES
LOW VCC DATA RETENTION WAVEFORM
DATA RETENTION MODE V CC tCDR V DR
CS
4.5V
V DR 2V
4.5V tR V IH
3089 drw 03
V IH
AC TEST CONDITIONS
Input Pulse Levels Input Rise/Fall Times Input Timing Reference Levels Output Reference Levels AC Test Load GND to 3.0V 5ns 1.5V 1.5V See Figures 1 and 2
3089 tbl 11
5V
5V
480 DATA OUT 255 30pF*
DATAOUT 255
480
5pF*
3089 drw 04
3089 drw 05
Figure 1. AC Test Load
Figure 2. AC Test Load (for tOLZ, tCLZ, tOHZ, tWHZ, tCHZ & tOW) *Including scope and jig.
5.1
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IDT6116SA/LA CMOS STATIC RAM 16K (2K x 8-BIT)
MILITARY AND COMMERCIAL TEMPERATURE RANGES
AC ELECTRICAL CHARACTERISTICS (VCC = 5V 10%, All Temperature Ranges)
6116SA15(1) 6116LA15(1) Symbol tRC tAA tACS tCLZ(3) tOE tOLZ(3) tCHZ(3) tOHZ(3) tOH tPU(3) tPD(3) Parameter Read Cycle Time Address Access Time Chip Select Access Time Chip Select to Output in Low-Z Output Enable to Output Valid Output Enable to Output in Low-Z Chip Deselect to Output in High-Z Output Disable to Output in High-Z Output Hold from Address Change Chip Select to Power-Up Time Chip Deselect to PowerDown Time Min. 15 -- -- 5 -- 0 -- -- 5 0 -- Max. -- 15 15 -- 10 -- 10 8 -- -- 15 READ CYCLE 20 -- -- 5 -- 0 -- -- 5 0 -- -- 19 20 -- 10 -- 11 8 -- -- 20 25 -- -- 5 -- 5 -- -- 5 0 -- -- 25 25 -- 13 -- 12 10 -- -- 25 35 -- -- 5 -- 5 -- -- 5 0 -- -- 35 35 -- 20 -- 15 13 -- -- 35 ns ns ns ns ns ns ns ns ns ns ns
3089 tbl 12
6116SA20 6116LA20 Min. Max.
6116SA25 6116LA25 Min. Max.
6116SA35 6116LA35 Min. Max. Unit
AC ELECTRICAL CHARACTERISTICS (VCC = 5V 10%, All Temperature Ranges) (Continued)
6116SA45 6116LA45 Symbol READ CYCLE tRC tAA tACS tCLZ tOE tOLZ(3) tCHZ(3) tOHZ(3) tOH
(3)
6116SA55(2) 6116LA55(2) Min. 55 -- -- 5 -- 5 -- -- 5 Max. -- 55 50 -- 40 -- 30 30 --
6116SA70(2) 6116SA90(2) 6116LA70(2) 6116LA90(2) Min. 70 -- -- 5 -- 5 -- -- 5 Max. -- 70 65 -- 50 -- 35 35 -- Min. 90 -- -- 5 -- 5 -- -- 5
6116SA120(2) 6116SA150(2) 6116LA120(2) 6116LA150(2) Max. -- 120 120 -- 80 -- 40 40 -- Min. 150 -- -- 5 -- 5 -- -- 5 Max. Unit -- 150 150 -- 100 -- 40 40 -- ns ns ns ns ns ns ns ns ns
3089 tbl 13
Parameter Read Cycle Time Address Access Time Chip Select Access Time Chip Select to Output in Low-Z Output Enable to Output Valid Output Enable to Output in Low-Z Chip Deselect to Output in High-Z Output Disable to Output in High-Z Output Hold from Address Change
Min. 45 -- -- 5 -- 5 -- -- 5
Max. -- 45 45 -- 25 -- 20 15 --
Max. Min. -- 90 90 -- 60 -- 40 40 -- 120 -- -- 5 -- 5 -- -- 5
NOTES: 1. 0C to + 70C temperature range only. 2. -55C to + 125C temperature range only. 3. This parameter guaranteed with the AC Load (Figure 2) by device characterization, but is not production tested.
5.1
6
IDT6116SA/LA CMOS STATIC RAM 16K (2K x 8-BIT)
MILITARY AND COMMERCIAL TEMPERATURE RANGES
TIMING WAVEFORM OF READ CYCLE NO. 1(1, 3)
tRC ADDRESS
tAA
tOH
OE
tOE
CS
tOHZ (5)
tOLZ (5) tACS tCLZ (5) tCHZ
(5)
DATA OUT ICC V CC Supply Currents ISB tPU
DATA VALID
tPD
3089 drw 06
TIMING WAVEFORM OF READ CYCLE NO. 2 (1, 2, 4)
tRC ADDRESS tAA tOH DATA OUT PREVIOUS DATA VALID DATA VALID
3089 drw 07
tOH
TIMING WAVEFORM OF READ CYCLE NO. 3 (1, 3, 4)
CS
tCLZ (5) DATA OUT
NOTES: 1. WE is HIGH for Read cycle. 2. Device is continously selected, CS is LOW. 3. Address valid prior to or coincident with CS transition LOW. 4. OE is LOW. 5. Transition is measured 500mV from steady state.
tACS
tCHZ DATA VALID
(5)
3089 drw 08
5.1
7
IDT6116SA/LA CMOS STATIC RAM 16K (2K x 8-BIT)
MILITARY AND COMMERCIAL TEMPERATURE RANGES
AC ELECTRICAL CHARACTERISTICS (VCC = 5V 10%, All Temperature Ranges)
6116SA15(1) 6116LA15(1) Symbol WRITE CYCLE tWC tCW tAW tAS tWP tWR tWHZ(3) tDW tDH(4) tOW(3,4) Write Cycle Time Chip Select to End-ofWrite Address Valid to Endof-Write Address Set-up Time Write Pulse Width Write Recovery Time Write to Output in High-Z Data to Write Time Overlap Data Hold from Write Time Output Active from End-of-Write 15 13 14 0 12 0 -- 12 0 0 -- -- -- -- -- -- 7 -- -- -- 20 15 15 0 12 0 -- 12 0 0 -- -- -- -- -- -- 8 -- -- -- 25 17 17 0 15 0 -- 13 0 0 -- -- -- -- -- -- 16 -- -- -- 35 25 25 0 20 0 -- 15 0 0 -- -- -- -- -- -- 20 -- -- -- ns ns ns ns ns ns ns ns ns ns
3089 tbl 14
6116SA20 6116LA20 Min. Max.
6116SA25 6116LA25 Min. Max.
6116SA35 6116LA35 Min. Max. Unit
Parameter
Min.
Max.
AC ELECTRICAL CHARACTERISTICS (VCC = 5V 10%, All Temperature Ranges)
6116SA45 6116LA45 Symbol tWC tCW tAW tAS tWP tWR tWHZ(3) tDW tDH(4) Parameter Write Cycle Time Chip Select to End of Write Address Valid to End of Write Address Set-up Time Write Pulse Width Write Recovery Time Write to Output in High-Z Data to Write Time Overlap Data Hold from Write Time Min. 45 30 30 0 25 0 -- 20 0 0 Max. -- -- -- -- -- -- 25 -- -- -- WRITE CYCLE 55 40 45 5 40 5 -- 25 5 0 -- -- -- -- -- -- 30 -- -- -- 70 40 65 15 40 5 -- 30 5 0 -- -- -- -- -- -- 35 -- -- -- 90 55 80 15 55 5 -- 30 5 0 -- -- -- -- -- -- 40 -- -- -- 120 70 105 20 70 5 -- 35 5 0 -- -- -- -- -- -- 40 -- -- -- 150 90 120 20 90 10 -- 40 10 0 -- -- -- -- -- -- 40 -- -- -- ns ns ns ns ns ns ns ns ns ns 6116SA55(2) 6116LA55(2) Min. Max. 6116SA70(2) 6116LA70(2) Min. Max. 6116SA90(2) 6116LA90(2) Min. Max. 6116SA120(2) 6116SA150(2) 6116LA120(2) 6116LA150(2) Min. Max. Min. Max. Unit
tOW(3,4) Output Active from End of Write
NOTES: 3089 tbl 15 1. 0C to +70C temperature range only. 2. -55C to +125C temperature range only. 3. This parameter guaranteed with AC Load (Figure 2) by device characterization, but is not production tested. 4. The specification for tDH must be met by the device supplying write data to the RAM under all operation conditions. Although tDH and tOW values will vary over voltage and temperature, the actual tDH will always be smaller than the actual tOW.
5.1
8
IDT6116SA/LA CMOS STATIC RAM 16K (2K x 8-BIT)
MILITARY AND COMMERCIAL TEMPERATURE RANGES
TIMING WAVEFORM OF WRITE CYCLE NO. 1, (WE CONTROLLED TIMING) WE
tWC ADDRESS tAW
CS
(1, 2, 5, 7)
tAS
WE
tWP(7)
tWR
(3)
tCHZ (6)
tWHZ DATA OUT PREVIOUS DATA VALID
(4)
(6)
tOW tDW tDH
(6)
DATA (4) VALID
DATA IN
DATA VALID
3089 drw 09
TIMING WAVEFORM OF WRITE CYCLE NO. 2, (CS CONTROLLED TIMING) (1, 2, 3, 5, 7) CS
tWC ADDRESS tAW
CS
tWR tAS tCW
(3)
WE
tDW DATA IN DATA VALID
tDH
3089 drw 10
NOTES: 1. WE or CS must be HIGH during all address transitions. 2. A write occurs during the overlap of a LOW CS and a LOW WE. 3. tWR is measured from the earlier of CS or WE going HIGH to the end of the write cycle. 4. During this period, the I/O pins are in the output state and the input signals must not be applied. 5. If the CS LOW transition occurs simultaneously with or after the WE LOW transition, the outputs remain in the high-impedance state. 6. Transition is measured 500mV from steady state. 7. OE is continuously HIGH. If OE is LOW during a WE controlled write cycle, the write pulse width must be the larger of tWP or (tWHZ + tDW) to allow the I/O drivers to turn off and data to be placed on the bus for the required tDW. If OE is HIGH during a WE controlled write cycle, this requirement does not apply and the write pulse is the specified tWP. For a CS controlled write cycle, OE may be LOW with no degradation to tCW.
5.1
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IDT6116SA/LA CMOS STATIC RAM 16K (2K x 8-BIT)
MILITARY AND COMMERCIAL TEMPERATURE RANGES
ORDERING INFORMATION
IDT 6116 Device Type XX Power XXX Speed X Package X Process/ Temperature Range
Blank Commercial (0C to +70C) Military (-55C to + 125C) B Compliant to MIL-STD-883, Class B TP P TD D SO Y 300 mil Plastic DIP (P24-1) 600 mil Plastic DIP (P24-2) 300 mil CERDIP (D24-1) 600 mil CERDIP (D24-2) 300 mil Small Outline IC, Gull-Wing Bend (SO24-2) 300 mil SOJ, J-Bend (SO24-4)
15 20 25 35 45 55 70 90 120 150 SA LA
Commercial Only
Military Only Military Only Military Only Military Only Military Only Standard Power Low Power
Speed in nanoseconds
3089 drw 11
5.1
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